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Implementation of 8-Point Slantlet Transform Based Polynomial Cancellation Coding-OFDM System Using FPGA

  • The objective of this paper is to implement a baseband OFDM transceiver on FPGA hardware. The design uses 8-point SLT/ISLT (Slantlet/Inverse Slantlet) for the processing module with processing block of 8 inputs data wide. All modules are designed and implemented using VHDL programming language. Software tools used in this work includes Altera Quartus II 7.2 and ModelSim Altera 6.1g, to assist the design process and downloading process into FPGA board while Cyclone III board EP3C120F780C7 is used to realize the designed module.

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Metadaten
Author:Hikmat N. Abdullah, Safaa A. Ali
URN:urn:nbn:de:hbz:832-epub4-2015
Year of Completion:2009
Document Type:Working Paper
Language:English
Date of Publication (online):2010/01/22
GND-Keyword:Field programmable gate array; OFDM
Tag:FPGA; OFDM; Polynomial cancellation coding; Slantlet Transform
Contributor:Hartung, Georg (Hrsg.)
Institutes:Informations-, Medien- und Elektrotechnik (F07) / Fakultät 07 / Institut für Nachrichtentechnik
Dewey Decimal Classification:600 Technik, Medizin, angewandte Wissenschaften / 620 Ingenieurwissenschaften und Maschinenbau
Open Access:Open Access