Development of a Software to Show Hierarchical Netlists for an Open Source Chipdesign IDE Using the Eclipse Layout Kernel
- This thesis covers the implementation and testing of a netlist viewer backend that can process hierarchical netlists produced by yosys. To determine the requirements posed to the implemented backend, several closed and open source netlist visualization programs are evaluated. Based on these requirements, three approaches for the implementation are proposed and implemented. The implementation is then both automatically and manually tested with regards to runtime and memory consumption. In these tests, the implementation achieves both lower processing times in comparison to netlistsvg and the existing FEntwumS Netlist Viewer backend and lower memory consumption compared to the existing FEntwumS Netlist Viewer backend.
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| Author: | Florian Kämpchen |
|---|---|
| URN: | urn:nbn:de:hbz:832-epub4-30675 |
| DOI: | https://doi.org/10.57683/EPUB-3067 |
| Referee: | Tobias Krawutschke, Sebastian Wittlich |
| Document Type: | Bachelor Thesis |
| Language: | English |
| Publishing Institution: | Hochschulbibliothek der Technischen Hochschule Köln |
| Granting Institution: | Technische Hochschule Köln |
| Year of final exam: | 2025 |
| Date of Publication (online): | 2025/10/22 |
| GND-Keyword: | Open Source |
| Tag: | Netlist Viewer; Open-Source Eclipse Layout Kernel; OneWare Studio; Yosys |
| Page Number: | 82 |
| Institutes: | Informations-, Medien- und Elektrotechnik (F07) / Fakultät 07 / Institute of Computer and Communication Technology |
| CCS-Classification: | B. Hardware |
| Dewey Decimal Classification: | 000 Allgemeines, Informatik, Informationswissenschaft |
| Open Access: | Open Access |
| Licence (German): |  Creative Commons - CC BY - Namensnennung 4.0 International |