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The objective of this paper is to implement a baseband OFDM transceiver on FPGA hardware. The design uses 8-point SLT/ISLT (Slantlet/Inverse Slantlet) for the processing module with processing block of 8 inputs data wide. All modules are designed and implemented using VHDL programming language. Software tools used in this work includes Altera Quartus II 7.2 and ModelSim Altera 6.1g, to assist the design process and downloading process into FPGA board while Cyclone III board EP3C120F780C7 is used to realize the designed module.
This paper presents the design procedure and implementation results of a proposed software defined radio (SDR) using Altera Cyclone II family board. The implementation uses Matlab/SimulinkTM, Embedded MatlabTM blocks, and Cyclone II development and educational board. The design has first implemented in Matlab/SimulinkTM environment. It is then converted to VHDL level using Simulink HDL coder. The design is synthesized and fitted with Quartus II 9.0 Web Edition® software, and downloaded to Altera Cyclone II board. The results show that it is easy to develop and understand the implementation of SDR using programmable logic tools. The paper also presents an efficient design flow of the procedure followed to obtain VHDL netlists that can be downloaded to FPGA boards.